Audience - Jobs

Job Title

Senior VLSI Verification Engineer

Job Description

Define and implement RTL/FPGA-based verification and silicon validation strategies for complex ASIC/ASSP mixed signal SOCs.

RTL module verification methodology and implementation
RTL full-chip verification methodology and implementation
FPGA-based verification methodology and implementation

Experience

Required

Five years of experience in digital ASIC/ASSP verification
Strong technical skills in the design/verification/silicon validation of mixed signal ASIC/ASSPs SOCs,
Profound knowledge of Verilog (or VHDL)
Direct experience with HDL verification tools and methodologies
Experience with random and directed VLSI verification approaches
Proficiency in scripting within and between digital verification tools
Excellent verbal and written communication skills.
Outstanding analytical and critical thinking skills.
Team player with strong initiative.

Desired

Seven years plus of experience in digital ASIC/ASSP verification.
Profound knowledge of C, C++ or Assembler
Knowledge of SystemVerilog
DSP or embedded processor micro-architecture design knowledge and experience.
Knowledge in digital, analog, and mixed signal SOC designs.
Background in ASIC/ASSPs targeted at signal processing
Background in the telecommunication, wireless industry, consumer electronics
Background in audio processing/processors
FPGA prototyping for verification experience

Education Requirments

Required

BSEE

Desired

MSEE

If you have the passion to grow with the company, please review the current job openings, and contact us at jobs@audience.com. Please include the title of the job that you're applying for.

Back to jobs